NASA’s HPSC chip transforms how spacecraft navigate, land, and explore

NASA’s new spaceflight chip tackles a stubborn problem, spacecraft still rely on outdated processors, yet future missions need faster onboard decisions. Early tests suggest a major leap in speed and resilience. As a result, hopes are raised for smarter probes, landers, and crewed systems.

A spacecraft can cross millions of miles, survive radiation, and land on another world. Yet its onboard computer often lags far behind the devices people carry in their pockets. That mismatch has long limited how much a mission can do on its own. Especially when help from Earth comes too late.

NASA now says it is closing that gap with a new processor designed to give spacecraft far more computing power while surviving the punishing conditions of space. The chip sits at the center of the agency’s High Performance Spaceflight Computing project, or HPSC. This effort is meant to support more autonomous missions, faster scientific analysis, and future human exploration beyond low-Earth orbit.

The processor is being developed through a commercial partnership with Microchip Technology Inc., with the project led by engineers at NASA’s Jet Propulsion Laboratory in Southern California. Additionally, it is supported by NASA’s Game Changing Development program.

“Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing,” said Eugene Schwanbeck, program element manager in NASA’s Game Changing Development program at the agency’s Langley Research Center, in Hampton, Virginia. “NASA’s commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration.”

The need is straightforward. Space missions require processors that can keep working under intense electromagnetic radiation, wild temperature swings, and jolts from launch, landing, and operation in unforgiving environments. Because of that, spacecraft often fly with older chips chosen for reliability, not speed.

That trade-off has become harder to accept as missions demand more onboard judgment. Far from Earth, communication delays can stretch long enough that spacecraft must react on their own. They may need to process landing data in real time. They might manage scientific instruments, detect hazards, classify objects, or make decisions without waiting for mission control.

NASA says HPSC is meant to handle those demands. The system-on-a-chip, small enough to fit in the palm of a hand, combines the main pieces of a computer into one package, including central processing units, networking, memory, input and output interfaces, and specialized computing functions. NASA describes it as delivering more than 100 times the computing capability of current space processors. Early testing has hinted at even larger gains. In fact, there are indications that it is operating at 500 times the performance of the radiation-hardened chips now in use.

At JPL, engineers began testing the processor in February and have been pushing it through radiation, thermal, shock, and functional trials.

“We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign,” said Jim Butler, High Performance Space Computing project manager at JPL.

The promise of faster processing is not just technical bragging rights. NASA says future spacecraft will need to run advanced autonomy, artificial intelligence and machine learning, image and signal processing, object detection and classification, and rapid data-flow management. Those jobs become even more important when a mission travels so far from Earth that real-time guidance is impossible.

That matters for everything from orbiters and rovers to crewed habitats and deep-space probes. A spacecraft equipped with stronger onboard computing could analyze more of its own data before sending it home. Consequently, this could speed the pace of discovery. It could also respond faster to sudden hazards, especially during high-risk moments like landing.

“There are also unique challenges associated with landing on planetary bodies,” Butler said. “To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data. This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps.”

The chip is also designed around a practical constraint that shapes nearly every mission: power. NASA says HPSC can be tuned to match a mission’s changing needs, with granular control over functions that can be shut down or placed in lower-power modes when they are not needed. That flexibility could make the processor useful across missions with very different power budgets and workloads.

Just as important, the design emphasizes fault tolerance and error correction. High-energy particles from the Sun and interstellar space can trigger computing errors that force spacecraft into “safe mode,” shutting down nonessential systems until operators sort out the problem. A processor that can resist or recover from such errors more effectively could reduce those disruptions.

The HPSC project has been active since 2021. It passed Critical Design Review in 2024, then reached tape-out in mid-2025, when the final design was sent to the foundry for fabrication. Later that year, the first processors were successfully manufactured.

In February 2026, the team marked a symbolic step by sending what NASA described as the first email from an HPSC processor. The subject line was “Hello Universe,” a nod to the simple test messages that marked the early days of computing.

As of March 2026, the chip was still undergoing testing to prove its power, performance, reliability, and radiation tolerance. NASA says the project will conclude once that work is complete and the processor becomes space qualified for future lunar, planetary, and human-exploration missions.

The processor is also meant to live beyond NASA. Microchip plans to make it commercially available, and samples have already gone to early access partners in defense and commercial aerospace. The same technology could also be adapted for Earth-based industries, including aviation and automotive manufacturing.

Another piece of the effort involves ecosystem building. NASA is leading the SOSAᵀᴹ Space Subcommittee, which is working on interoperable avionics standards meant to support a broader spaceflight computing ecosystem around HPSC. The idea is that common standards could help government and industry build more efficient systems around the new processor.

If HPSC performs as NASA hopes, the biggest change may be simple: spacecraft would spend less time waiting. They could process more information onboard, react faster during landing or navigation, and handle more complex operations without immediate help from Earth. That would be especially valuable for missions deeper into the solar system, where communication delays make autonomy essential.

For astronauts, stronger onboard computing could support habitats and mission systems on the Moon and Mars. For robotic missions, it could mean better data handling, more capable instruments, and quicker decisions in risky environments.

Because the processor is being built through a commercial partnership with broader industry support, the technology may shape not only future NASA missions but also aerospace and industrial systems on Earth.

The original story "NASA’s HPSC chip transforms how spacecraft navigate, land, and explore" is published in The Brighter Side of News.

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